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#1
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Independant BUS between the CPU and RAM?
I was told that Motherboards that use hyper transport that the connection between RAM and the CPU are independant, not connecting to hypertranport. Now how would data get from the hard drive to the RAM like its suppose to if there is no bus connecting to the independant bus that lays between the CPU and RAM? And I don't think the data can go strieght through the CPU to the RAM, the graph I looked at looked something like this....
RAM------- | CPU | | Northbridge | | Southbridge-----HARDDRIVE |
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#2
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http://www.google.com/search?hl=en&...rtransport+work
Don't quite understand what you're asking, try looking at some of the stuff from the above search to increase your understanding of hypertransport and better define your question.
__________________
--Dave-- U2kgSG9jIExlZ2VyZSBTY2lzLCBOaW1pdW0gRXJ1ZGl0aW9uaXMgSGFiZXM= |
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#3
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Well on motherboards that use hypertransport there is a bus that connects the RAM and CPU together, according to what I've heard there is no hypertransport bus that connects to that bus that connects the CPU and ram together, the bus that connects the CPU and ram together is independant. When data is going to be loaded from the hard drive to the RAM how would the data from the hard drive get to RAM if there is no connection to the bus that connects the CPU and ram together? I've looked around the net on something that would possibly explain this but I can't find anything on it.
Let me know again if I did not explain clear enough. ![]() |
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#4
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If I understand things correctly, there is no problem with the setup you describe. The CPU and RAM do indeed have a dedicated bus. However, that doesn't mean that is the only connection the RAM has. The chipset is connected to the RAM on its own. So data would go from the hdd to the chipset, from there to the RAM, and then to the CPU, and back as needed.
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#5
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sounds right, thanks a million
One more cerious question, back before when the memory controller was intergrated on to the CPU, was it intergrated in the chipset? |
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#6
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Yes. On systems other than the Athlon64's and such, the memory controller is in the Northbridge.
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#7
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ACTUALLY by the way. Would you or anyone know what that bus is called that connects the Chipset and RAM together?
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