| Given that a particular process is associated with the following table, (addresses are in <p,d> form) and each address is 1000 bytes: |
I'm not familiar with the <p,d> format.
is 1000 bytes? Or does each address point to a 1000 byte section of memory? Or is each page or frame 1000 bytes?
| More specifically, How would I determine whether any given LOGICAL ADDRESS is a legal one? |
To convert a logical address into a physical address, the MMU first takes the logical address and determines its page number.
For example, if I have a 4-bit address:
I can choose to use the top two high order bits for my page number. This allows me to divide my address into a total of 4 pages:
0b00## (0b0000 through 0b0011) (page 0)
0b01## (etc.) (page 1)
0b10## (page 2)
0b11## (page 3)
My MMU has a table which maps page numbers to frame numbers for this particular process:
Page ..... Frame
Now, say I have an address of 0b1101. The 0b11 tells me to look up Page 3 in my table. This tells me that the physical address of the memory is 55 frames from the start of the memory. If each frame is 1000 bytes, then virtual address 0b1100 is located at byte #55,000.
However, I'm looking for 0b1101, not 0b1100. So I then have to add the offset (the lower-order bits that were not used for the page lookup). In the case of this example, the lower order bits are 01. This offset is added to the physical address (byte #55,000) so I end up with my physical address being physical byte #55,004 (note: I'm assuming a word size of 32 bits / 4 bytes, so memory address 0b01 points to the 4th byte, and 0b10 points to the 8th byte).
A logical address is invalid if its higher-order bits don't map to a valid page number.
Note, it's been a while since I've dealt with MMUs so my terminology might be off a little.