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    how to compile multiple programs using single Makefile?


    Hello.

    The following Makefile in LINUX should compile two unrelated programs. but for some reason it only complies my_uname1 but not my_uname2. I know the reason has to do with primary target which is my_uname1: but then how can i compile to saperate programs? how can i make it work?


    my_uname1: my_uname1.o
    g++ -o my_uname1 my_uname1.o

    my_uname2: my_uname2.o
    g++ -o my_uname2 my_uname2.o

    my_uname1.o: my_uname1.cc
    g++ -c my_uname1.cc

    my_uname2.o: my_uname2.cc
    g++ -c my_uname2.cc

    Thank you...
  2. #2
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    ~


    give u a sameple to compile

    -------------file name : makemyprogram-------------------
    part2: error.o main.o
    cc -o part2 error.o main.o

    error.o: error.c ***.h
    cc -c error.c

    main.o: main.c ***.h
    cc -c main.c
    ----------------------------------

    command : make -f makemyprogram
  4. #3
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    Make will build one root target, so you need a target rule for which both programs are a dependency, for example:

    all : my_uname1 my_uname2

    Clifford
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    Thanks but.


    uhm. it still doesn't work :(. Make does produce two object files for each my_uname. But only one executable, while i need two for each program!

    all: my_uname1.o my_uname2.o
    g++ -o my_uname1 my_uname1.o
    g++ -o my_uname2 my_uname2.o

    does not work.

    Any more help is really needed.
    Thanks!
  8. #5
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    Originally Posted by modamax
    uhm. it still doesn't work :(. Make does produce two object files for each my_uname. But only one executable, while i need two for each program!

    all: my_uname1.o my_uname2.o
    g++ -o my_uname1 my_uname1.o
    g++ -o my_uname2 my_uname2.o

    does not work.

    Any more help is really needed.
    Thanks!
    That is not what I said :rolleyes: . The 'all' target is a separate rule additional to your existing rules, not in place of them. The dependencies of 'all' should be the other two targets, not the two object files. There are no commands associate with 'all'. Making the target 'all' will then force both my_uname targets to be evaluated. Just add the 'all' rule as I posted it, and leave the other rules as they were.

    Clifford.
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    # you are not using the power of make.
    # make is not a shell, it's a tool. it pourpose is to make IF there
    # is something to make :)
    # put in aaa.c:
    #
    Code:
       int main(int argc,char **argv){ exit(printf("HALLO %s\n",*argv)); }
    #
    # bbb.c and ccc.c have to be present, maybe empty (does not matter)
    # put the code below in [Mm]akefile and try twice 'make'
    # the 1. time it compiles, the second NOT
    # then touch bbb.c and retry 'make'
    # to force remaking enter: make clean
    #
    # NOTA: this is a small exemple, i would use libs and other features.
    # pay attentions on tabs '\t' they are significant in makefiles.
    #
    Code:
    #------ coustomer definitions
    
    OBJS = aaa bbb ccc
    EXEC = first_run second_run third_run
    
    #------ constant definitions
    
    ALL_OBJ = $(OBJS:%=%.o)
    
    all: $(EXEC)
    
    clean:
    	$(RM) $(EXEC) $(OBJS) $(ALL_OBJ); make all
    
    CC = cc # normally still defined /usr/share/lib/make/make.rules
    
    DO_OBJS = $(CC) -c -o $@.o $@.c; touch $@
    DO_EXEC = $(CC) -s -o $@ $(ALL_OBJ)
    
    #------ now compile
    
    $(OBJS):	$(@:%=%.o)
    		$(DO_OBJS)
    
    $(EXEC):	$(OBJS)
    		$(DO_EXEC)
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    makefile problem


    Guys,

    I have the same problem. I compile 3 programs in a makefile but it does not create 3 executables.

    The following is my makefile: can anybody clarify???

    include ../Conf/$(ARCH).conf

    CFLAGS=$(COPTS) $(INCLDIRS) $(LINKDIRS)

    FILES = poissdist gaussdist prunelist

    all: $(FILES)
    put $(FILES)
    rm -f *.o

    clean:
    rm -f *.o

    poissdist: poissdist.o
    cc $(CFLAGS) -o poissdist poissdist.o -lnrlib -lim -lm

    poissdist.o: poissdist.c
    cc $(CFLAGS) -ansi -c poissdist.c -o poissdist.o

    gaussdist: gaussdist.o
    cc $(CFLAGS) -o gaussdist gaussdist.o -lnrlib -lim -lm

    gaussdist.o: gaussdist.c
    cc $(CFLAGS) -ansi -c gaussdist.c -o gaussdist.o

    prunelist: prunelist.o
    cc $(CFLAGS) -o prunelist prunelist.o -lnrlib -lim -lm

    prunelist.o: prunelist.c
    cc $(CFLAGS) -ansi -c prunelist.c -o prunelist.o


    Thanks,


    Originally Posted by guggach
    # you are not using the power of make.
    # make is not a shell, it's a tool. it pourpose is to make IF there
    # is something to make :)
    # put in aaa.c:
    #
    Code:
       int main(int argc,char **argv){ exit(printf("HALLO %s\n",*argv)); }
    #
    # bbb.c and ccc.c have to be present, maybe empty (does not matter)
    # put the code below in [Mm]akefile and try twice 'make'
    # the 1. time it compiles, the second NOT
    # then touch bbb.c and retry 'make'
    # to force remaking enter: make clean
    #
    # NOTA: this is a small exemple, i would use libs and other features.
    # pay attentions on tabs '\t' they are significant in makefiles.
    #
    Code:
    #------ coustomer definitions
    
    OBJS = aaa bbb ccc
    EXEC = first_run second_run third_run
    
    #------ constant definitions
    
    ALL_OBJ = $(OBJS:%=%.o)
    
    all: $(EXEC)
    
    clean:
    	$(RM) $(EXEC) $(OBJS) $(ALL_OBJ); make all
    
    CC = cc # normally still defined /usr/share/lib/make/make.rules
    
    DO_OBJS = $(CC) -c -o $@.o $@.c; touch $@
    DO_EXEC = $(CC) -s -o $@ $(ALL_OBJ)
    
    #------ now compile
    
    $(OBJS):	$(@:%=%.o)
    		$(DO_OBJS)
    
    $(EXEC):	$(OBJS)
    		$(DO_EXEC)

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    • DaWei_M disagrees : Don't hijack another's thread; particularly one that's 6 years old.
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    A Generic Makefile for Building Multiple main() Targets in $PWD


    ############################################################################
    # 'A Generic Makefile for Building Multiple main() Targets in $PWD'
    # Author: Robert A. Nader (2012)
    # Email: naderra at some gmail
    # Web: xiberix dot com
    ############################################################################
    # The purpose of this makefile is to compile to executable all C source
    # files in CWD, where each .c file has a main() function, and each object
    # links with a common LDFLAG.
    #
    # This makefile should suffice for simple projects that require building
    # similar executable targets. For example, if your CWD build requires
    # exclusively this pattern:
    #
    # cc -c $(CFLAGS) main_01.c
    # cc main_01.o $(LDFLAGS) -o main_01
    #
    # cc -c $(CFLAGS) main_2..c
    # cc main_02.o $(LDFLAGS) -o main_02
    #
    # etc, ... a common case when compiling the programs of some chapter,
    # then you may be interested in using this makefile.
    #
    # What YOU do:
    #
    # Set PRG_SUFFIX_FLAG below to either 0 or 1 to enable or disable
    # the generation of a .exe suffix on executables
    #
    # Set CFLAGS and LDFLAGS according to your needs.
    #
    # What this makefile does automagically:
    #
    # Sets SRC to a list of *.c files in PWD using wildcard.
    # Sets PRGS BINS and OBJS using pattern substitution.
    # Compiles each individual .c to .o object file.
    # Links each individual .o to its corresponding executable.
    #
    ###########################################################################
    #
    PRG_SUFFIX_FLAG := 0
    #
    LDFLAGS := -L./ll -lll
    CFLAGS_INC := -I./ll
    CFLAGS := -g -Wall $(CFLAGS_INC)
    #
    ## ==================- NOTHING TO CHANGE BELOW THIS LINE ===================
    ##
    SRCS := $(wildcard *.c)
    PRGS := $(patsubst %.c,%,$(SRCS))
    PRG_SUFFIX=.exe
    BINS := $(patsubst %,%$(PRG_SUFFIX),$(PRGS))
    ## OBJS are automagically compiled by make.
    OBJS := $(patsubst %,%.o,$(PRGS))
    ##
    all : $(BINS)
    ##
    ## For clarity sake we make use of:
    .SECONDEXPANSION:
    OBJ = $(patsubst %$(PRG_SUFFIX),%.o,$@)
    ifeq ($(PRG_SUFFIX_FLAG),0)
    BIN = $(patsubst %$(PRG_SUFFIX),%,$@)
    else
    BIN = $@
    endif
    ## Compile the executables
    %$(PRG_SUFFIX) : $(OBJS)
    $(CC) $(OBJ) $(LDFLAGS) -o $(BIN)
    ##
    ## $(OBJS) should be automagically removed right after linking.
    ##
    veryclean:
    ifeq ($(PRG_SUFFIX_FLAG),0)
    $(RM) $(PRGS)
    else
    $(RM) $(BINS)
    endif
    ##
    rebuild: veryclean all
    ##
    ## eof Generic_Multi_Main_PWD.makefile
    ##

    Comments on this post

    • salem disagrees : Another driveby 1-poster bumping a thread that is 8 YEARS OLD - nobody cares anymore

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